(1) Field of the Invention
The present invention relates to a complementary metal-insulator semiconductor (CMIS) circuit device and in particular to a CMIS circuit device comprising an integrated circuit (IC) chip which is selected by two chip-select signals having opposite polarities and which has a battery backup condition that can be established by either of the two chip-select signals.
(2) Description of the Prior Art
In many cases, a plurality of IC chips of semiconductor memories and so on are used in one system, such as a computer, for the purpose of increasing the memory capacity. In such a system, a desired IC chip is selected from the plurality of IC chips for data reading or writing by a chip-select signal. In such a system, it is desirable to cause the IC chips not selected by the chip-select signal, i.e., the unselected chips, to assume a battery backup condition in which no current flows from the power source.
In a conventional CMIS circuit device, it is possible to select the IC chip and to cause the circuit device to assume a battery backup condition by using one chip-select signal or by using two chip-select signals having the same polarity. There is also known a CMIS circuit device in which an IC chip is selected by using two chip-select signals having opposite polarities. However, in the latter conventional CMIS circuit device, it is impossible to select an IC chip by independently using either of the two chip-select signals having opposite polarities.